1. Field of the Invention
The invention generally relates to kerf design processing during semiconductor chip design processing, in particular, to coordinating kerf design and chip design processes.
2. Background Description
Semiconductor wafers used in manufacturing chips typically have a kerf, the space on a wafer between die. This space must be large enough to allow separation of the die by culling or breaking without damage to the die. A kerf may also be known as a scribe line, a saw-kerf, or a street.
In addition to being space set aside for a dicing saw, this space may also contain a wide array of alignment and measurement sites. These sites may be used by expose tools for alignment from one process step to a previous step or steps, and they may be used by the sawing tool to align the saw blade to the kerf. The sites are used optically to measure overlay achieved from one process step to the previous step or steps.
The alignment and measurement sites may also be used by characterization engineers to monitor the critical dimensions, function and performance of devices similar to devices in the active chip. Many of these alignment and measurement sites, by their nature, do not usually require tight correlation to the active chip, but the devices used by the characterization engineers for parametric evaluation may require exact correlation to the active chip. This exact correlation is very difficult to implement.
The active chip design may go through many manipulations where process enhancing design changes are made. Designed lines may be grown or shrunk, design anchors, or serifs may be added, new layers may be derived, non-functional shapes may be added, parts of designed shapes may be removed, etc.
For there to be an exact correlation between the chip and the kerf, the kerf receives the same manipulations as the chip. Manipulations to the kerf design data are typically submitted manually, and stored in data libraries some time prior to the chip design data being sent to photo mask build. With frequent changes to the actual manipulation algorithms, there is no guarantee that the kerf design data has received the exact same manipulations as the chip design data.
Frequent changes may lead to inconsistencies between the kerf and chip design data resulting in problems with the characterization information retrieved from the kerf. It may also lead to delays in schedules if the submission of data for photo mask build is delayed due to kerf data manipulation time. Also, many versions of the same kerf design must be stored, because the kerf design data must be manipulated in various differing ways to meet specific semiconductor manufacturing line requirements. This may lead to logistical complications for the kerf designers, etc. who must maintain multiple libraries of kerf designs, and for the Product Engineers who must specify the correct version of the kerf design in their mask orders.
Currently, multiple copies of the kerf feature designs have to be stored, each having received different chip manipulation processing, in anticipation of the chip manipulation processing that might occur for the chips that would eventually specify the kerf part number. Manipulating the kerf design data prior to the chip manipulation (in some cases weeks or months prior to the chip manipulation) means there is a high risk of different versions of the design manipulation utilities being used for the kerf and chip design manipulation processing, resulting in differences in kerf and chip features in the design data and less accurate wafer testing using kerf features.